Field of the Invention
The invention relates to a semiconductor device and a method of manufacturing the same, and more particularly relates to a memory device and a method of manufacturing the same.
Description of Related Art
With the advancement of technology, it has become a trend to integrate components of the memory cell array region and the peripheral circuit region on the same chip in order to reduce costs, simplify manufacturing steps, and save the chip area. However, due to the increasing aspect ratio of the memory device, the different pattern densities of the memory cell array region and the peripheral circuit region may easily cause the micro-loading effect. The micro-loading effect generally refers to errors of the size of the semiconductor device that occur during the etching process due to the different pattern densities. For example, the peripheral circuit region where the pattern density is lower may easily have a sub-trench defect that poses difficulty for the window of the subsequent processes. Therefore, how to prevent the micro-loading effect between the memory cell array region and the peripheral circuit region and improve the sub-trench defect of the peripheral circuit region is an important issue that needs to be addressed.